Most of the commonly used non-volatile memory requires switches to selectively apply high voltages to specific circuit elements of the non-volatile memory. A laterally diffused metal oxide semiconductor (LDMOS) can be used in a high-voltage switch for selectively applying high voltages to the circuit elements. However, the LDMOS is a non-self-aligned and a non-foundry proven semiconductor device. Moreover, usage of the LDMOS in the high-voltage switch has certain limitations including additional design space which may increase product cost. In addition, voltage related stress and functional risks are higher in case of the high-voltage switch designed using the LDMOS. Also, the capability of the high-voltage switch with LDMOS to work with high input and output voltages is limited, for example 2× p-type metal oxide semiconductor (PMOS) drain breakdown voltage (U.S. Pat. No. 7,145,370 B2), and 3×PMOS drain breakdown voltage.